The present invention relates to a multichip semiconductor device using multiple chips.
The present invention also relates to a chip for a multichip semiconductor device and a method of manufacture thereof.
Recent computers and communication equipment use for their important section a large-scale integrated circuit (chip) which has a great number of electronic components, such as transistors, resistors, etc., integrated into a semiconductor substrate. Thus, the performance of the entire equipment depends largely on the performance of the chip.
On the other hand, so-called multichip semiconductor devices have proposed, each having a plurality of chips to improve the whole performance of the equipment. FIGS. 1, 2 and 3 are sectional views of conventional multichip semiconductor devices.
FIG. 1 shows a multichip semiconductor device of a type in which a plurality of chips 82 are placed side by side on a multilayered interconnection substrate 81. Reference numeral 83 denotes a solder bump.
FIG. 2 shows a multichip semiconductor device of a type in which chips are connected together with their major surfaces opposed to each other. FIG. 3 shows a multichip semiconductor device of a type in which a plurality of chips 82 are stacked using stacking plates 84.
However, these conventional multichip semiconductor devices have the following problems.
In the multichip semiconductor device shown in FIG. 1, the plane area of the device increases because the chips 82 are arranged in the same plane.
The conventional semiconductor device of FIG. 2 is free of the problem with the device of FIG. 1 that the plane area of the device increases. This is because the chips 82 are stacked one above another. However, the device of FIG. 2 has a problem that the number of chips that can be stacked is limited to two. In addition, it is difficult to electrically test each chip.
The conventional semiconductor device of FIG. 3 does not suffer from the problems with the conventional semiconductor devices of FIGS. 1 and 2. However, its structure is complex, its thickness is great, and its manufacturing cost is high. This is because a stacking late 84 need to be provided between any two adjacent two chip.
It is therefore an object of the present invention to provide a multichip semiconductor device which has a small plane area, a simple structure, and a small thickness.
It is another object of the present invention to provide a chip which makes it possible to implement such a multichip semiconductor device and to provide a method of manufacturing the chip.
According to a first aspect of the present invention, there is provided a multichip semiconductor device having a stack of chips each having a semiconductor substrate which has a surface on which circuit components are formed and an interlayer insulating film formed on the surface of the semiconductor substrate, wherein at least one chip of the chips has a connect plug formed in a through hole which passes through the semiconductor substrate and a part of the interlayer insulating film, and the one chip having the connect plug is electrically connected with a another chip of the chips by the connect plug.
For example, the interlayer insulating film is a interlayer insulating film of a first layer covered with the circuit component.
According t o a second aspect of the invention, there is provided a multiple semiconductor device according to the first aspect, in which the another chip has a connect member that electrically connects with the connect plug, and the connect member is, for example, a metal bump.
According to third aspect of the invention, there is provided a multiple semiconductor device according to the first aspect, wherein the one chip and the another chip are electrically connected with each other through a packing member. The packing member is an interconnecting substrate or TAB tape.
According to a fourth aspect of the present invention, there is provided a chip for use in a multichip semiconductor device, comprising:
a semiconductor substrate having a surface on which circuit components are formed;
an interlayer insulating film formed on the surface of the semiconductor substrate; and
a connect plug made of a metal formed in a through hole that passes through a part of the interlayer insulating film and the semiconductor substrate and adapted to provide an electrical connection for another chip.
According to a fifth aspect of the invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole and an insulating film formed between the metal plug and a sidewall of the through hole.
According to a sixth aspect of the present invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole and having a cavity, an insulating film formed between the metal plug and a sidewall of the through hole, and a low stress film formed in the cavity of the metal plug, the low stress film being smaller than the metal plug in the difference in thermal expansion coefficient from the semiconductor substrate.
According to a seventh aspect of this invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole so that a space is left in the through hole on the top side of the semiconductor substrate, an insulating film formed between the metal plug and the sidewall of the through hole, and a cap layer formed in the space in the through hole.
According to an eighth aspect of the invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole so that a space is left in the through hole on the rear side of the semiconductor substrate, an insulating film formed between the metal plug and a sidewall of the through hole, and a connect member formed in the space in the through hole.
The rear side of the semiconductor substrate on the connect member side is preferably coated with an insulating film except the area of the connect member.
According to a ninth aspect of the present invention, there is provided a method of forming a chip for use in a multichip semiconductor device, comprising the steps of:
forming circuit components on a surface of semiconductor substrate;
forming an interlayer insulating film over the major surface of the semiconductor substrate;
selectively etching the interlayer insulating film and the semiconductor substrate to form a hole that passes through the interlayer insulating film but not the semiconductor substrate;
forming an insulating film on the sidewall and bottom of the hole to a thickness that does not fill up the hole;
filling the hole covered with the insulating film with a metal to form a metal plug; and
processing a rear side of the semiconductor substrate to thereby expose the metal plug at the bottom of the hole.
According to a tenth aspect of the invention, there is provided a method according to the ninth aspect, wherein the hole is formed prior to the formation of an interconnection layer which, of interconnection layers to be formed above the semiconductor substrate, has the lowest melting point.
According to an eleventh aspect of the present invention, there is provided a method according to the ninth aspect, in which the step of processing the rear side of the semiconductor substrate is performed after the semiconductor substrate has been cut out from a wafer.
According to a twelfth aspect of the present invention, there is provided a method of forming a chip for use in a multichip semiconductor device, comprising the steps of:
manufacturing circuit components on a surface of semiconductor substrate using integrated-circuit techniques;
forming an interlayer insulating film on the surface of the semiconductor substrate;
selectively etching the interlayer insulating film and the semiconductor substrate to form a hole that passes through the interlayer insulating film but not the semiconductor substrate;
forming a first insulating film on a sidewall and bottom of the hole to a thickness that does not fill up the hole;
filling the hole with a second insulating film which has a higher etch rate than the first insulating film;
forming a contact hole in the interlayer insulating film and forming an interconnection layer that connects with the circuit components through the contact hole;
processing a rear side of the semiconductor substrate and the first insulating film in the hole to expose the second insulating film at the bottom of the hole;
etching away the second insulating film in the hole; and
filling the hole covered with the first insulating film with a metal to form a metal plug.
According to a thirteenth aspect of the invention, there is provided a method according to the twelfth aspect, in which the rear side of the semiconductor substrate is processed after the semiconductor substrate has been cut out from a wafer.
According to a fourteenth aspect of the present invention, there is provided a method of forming a chip for use in a multichip semiconductor device, comprising the steps of:
manufacturing circuit components on a semiconductor substrate using integrated-circuit techniques;
forming an interlayer insulating film over a surface of the semiconductor substrate;
selectively etching the interlayer insulating film and the semiconductor substrate to form a hole that passes through the interlayer insulating film but not the semiconductor substrate;
forming a first insulating film on a sidewall and bottom of the hole to a thickness that does not fill up the hole;
filling the hole covered with the first insulating film with a metal to form a metal plug;
process a rear side of the semiconductor substrate to expose the first insulating film at the bottom of the hole;
selectively etching the rear side of the semiconductor substrate until the first insulating film on the sidewall of the hole which is above the first insulating film at the bottom of the hole is exposed;
forming a second insulating film over the entire rear side of the semiconductor substrate; and
etching the first and second insulating films until the metal plug at the bottom of the hole is exposed, thereby selectively remaining the second insulating film on the rear side of the semiconductor substrate in the side of the bottom of the hole.
According to a fifteenth aspect of this invention, there is provided a method according to the fourteenth aspect, in which the hole is formed prior to the formation of an interconnection layer which, of interconnection layers to be formed above the semiconductor substrate, has the lowest melting point.
According to a sixteenth aspect of the invention, there is provided a method according to the fourteenth aspect, in which the step of processing the rear side of the semiconductor substrate is performed after the semiconductor substrate has been cut out from a wafer.
According to a seventeenth aspect of the invention, there is provided a semiconductor chip for use in a multichip semiconductor device comprising:
a semiconductor substrate formed on a circuit components;
a first interlayer insulating film formed on the semiconductor substrate;
a second insulating film formed on a sidewall of a through hole that passes through the first insulating film and the semiconductor substrate;
a metal plug that fills up the through hole;
a second interlayer insulating film formed on the first interlayer insulating film;
an interconnection layer formed on the metal plug;
a plug formed on the interconnection layer; and
a connect member formed on the plug to provide an electrical connection for another chip.
Unlike the conventional multichip semiconductor device in which a plurality of chips are arranged side by side, the present invention in which a plurality of chips are stacked has no problem that the plane area of the device increases.
Moreover, unlike the conventional multichip semiconductor device in which two chips are connected together with their major surfaces opposed to each other, the multichip semiconductor device of the present invention has no problem that the number of chips to be stacked is limited to two because the chips are connected together by means of the metal plugs that pass through the silicon substrate and the first interlayer insulating film.
Furthermore, unlike the conventional semiconductor device in which chips are stacked with the aid of stacking plates, the semiconductor device of the present invention has no problems of complexity of the structure and increased thickness because no stacking plate is used to connect the chips together.
The present invention can therefore provide a multichip semiconductor device which has a small plane area, a simple structure, and a small thickness.
A chip for use in a multichip semiconductor device of the present invention has a connect plug that is formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film and adapted to provide an electrical connection for another chip.
Therefore, the semiconductor device using such a chip has a small plane area, a simple structure, and a small thickness.
The connect plug has also the effect of radiating heat of the chip. By putting a probe to the connect plug from the rear side of the chip, the device or chip can be tested.
In the present invention, the hole that passes through the semiconductor substrate and the interlayer insulating film is not formed immediately. This is because semiconductor substrates are generally not so thin as to allow the through hole to be formed immediately.
That is, in the present invention, a hole is formed first which passes through the interlayer insulating film but not the semiconductor substrate and then a metal film, serving as the connect plug, is formed in the hole with an insulating film interposed therebetween.
Following such processes, the rear side of the semiconductor substrate and the insulating film are processed until the metal film at the bottom of the hole is exposed, whereby the through hole that passes through the semiconductor substrate and the insulating film is formed. Thus, even if the starting semiconductor substrate is thick, the through hole can be formed easily.
In the present invention, the contact hole is formed in the interlayer insulating film in the state where the hole is filled with the second insulating film having a higher etch rate than the first insulating film and the interconnection layer is formed which connects with the circuit components through the contact hole. After that, the second insulating film is selectively etched away to form the metal film in the hole. Thus, the metal film will not be affected by heat treatment for forming the interconnection layer.
This prevents the degradation of characteristics of the chip due to ingredients of the metal film diffusing into the semiconductor substrate. Unlike the case where a diffusion preventing structure, such as a barrier, is formed so as to prevent the diffusion of the ingredients of the metal film, there is no need for complicated processes.
According to the present invention, the through hole can be formed easily and the exposed surface of the semiconductor substrate on the hole bottom side is coated easily with the second insulating film.
The processing of the rear side of the semiconductor substrate by polishing or etching is preferably performed after the chip has been cut out from a wafer. The reason is that it is difficult to uniformly process the wafer, which is generally large and exhibits low mechanical strength.
According to an 18th aspect of the invention, there is provided a multichip semiconductor device comprising:
chips each having a semiconductor substrate on which devices are integrally formed; and
a connecting substrate provided between adjacent two of the chips which are vertically arranged,
wherein the vertically adjacent two chips are electrically connected via the connecting substrate, a through-hole is formed in at least one of the semiconductor substrates, and a conductive plug is formed in the through-hole and connected to the connecting substrate.
The through-hole may be provided in either or both of the semiconductor substrates of the two chips.
According to a 19th aspect of the invention, a material of the connecting substrate has higher radiation properties than a material of each chip.
Specifically, in the case of a Si chip, the connecting substrate is formed of an insulating material such as SiC.
According to 20th aspect of the invention, the connecting substrate comprises:
a connecting substrate body having the conductive plug formed in the through-hole passing through the connecting substrate; and
a high-thermal-conductivity member having a higher thermal conductivity than the connecting substrate body.
Specifically, where the connecting substrate is formed of an insulating material such as SiC, the high-thermal-conductivity member is formed of a metallic material such as W or Cu.
According to a 21st aspect of the invention, the high-thermal-conductivity member is a conductive plate formed within the connecting substrate body.
In this case, a conductive plate may be provided on the surface of the connecting substrate. In addition, the conductive plate may be provided both within the connecting substrate and on the surface of the connecting substrate.
According to a 22nd aspect of the invention, the high-thermal-conductivity member is a radiation fin provided on a surface of the connecting substrate body.
The radiation fin may be provided on each of all the connecting substrates, or only on a specific connecting substrate, e.g. a connecting substrate with low radiation properties.
According to a 23rd aspect of the invention, there is provided a multichip semiconductor device comprising:
chips each having a semiconductor substrate on which devices are integrally formed; and
a connecting substrate provided between adjacent two of the chips which are vertically arranged,
wherein a through-hole is formed in the connecting substrate, and a conductive plug is formed in the through-hole,
each of the vertically adjacent two chips is electrically connected to the conductive plug via bumps, and
the connecting substrate has heating units for heating the bumps.
According to a 24th aspect of the invention, there is provided a multichip semiconductor device comprising:
chips each having a semiconductor substrate on which devices are integrally formed; and
a connecting substrate provided between adjacent two of the chips which are vertically arranged,
wherein a through-hole is formed in the connecting substrate, and a conductive plug is formed in the through-hole,
the vertically adjacent two chips are electrically connected to each other via the conductive plug, and
the connecting substrate is formed of a material having a thermal expansivity substantially equal to a thermal expansivity of each semiconductor substrate.
The advantages of the above-described aspects of the invention will now be described.
According to the 18th aspect of the invention, since a plurality of chips are stacked, the area in plan of the device can be reduced, unlike the conventional multichip semiconductor device in which a plurality of chips are arranged in a plane.
In addition, the chip in which conductive plug is formed may be situated at the top or bottom of the device and thus the test probes can easily be put in contact with the conductive plug. Therefore, inspections of the device can easily be performed.
According to the 20th to 22nd of the invention, the connecting substrate has a sufficiently higher radiation properties than the chip and the heat of the chip can be efficiently radiated to the outside through the connecting substrates. Since the radiation properties of the device are thus improved, deterioration in operational characteristics of the chip and a decrease in life of the chip due to the heat produced in operation of the chip can be prevented.
According to the 23rd aspect of the invention, the bumps connected to a defective chip are melted by heater units of the connecting substrate, and the defective chip can be separated from connecting substrate. Therefore, the repairs of the chip can easily be made. In particular, where the heating units of each connecting substrate can be independently controlled, the repairs of the chip can be made more easily.
According to the 24th aspect of the invention, since the thermal expansivity of the material of the connecting substrate is substantially equal to that of the material of the semiconductor substrate, there is no need to use the adhesive including the filler in order to make their thermal expansivities close to each other.
Accordingly, even if the integration density of the chip further increases and the distance between the connecting substrate and the semiconductor substrate further decreases, there occurs no region which is not filled with the adhesive. Therefore, reliable connection between the chip and the connecting substrate is ensured, and thus reliable connection between the upper and lower chips is ensured.
In the case where the thermal expansivity of the material of the connecting substrate is nearly equal to that of the material of the semiconductor substrate, no thermal strain occurs in the bumps even if the bumps are used to connect the connecting substrate and semiconductor substrate.
Accordingly, even if the integration density of the chip further increases and the distance between the chip and the connecting substrate further decreases, reliable connection between the connecting substrate and the semiconductor substrate is ensured, and thus reliable connection between the upper and lower chips is ensured.
FIG. 35 is a table showing the thermal conductivity and linear expansivity of principal materials of the semiconductor substrate used for chips and the connecting substrate.
In the present invention, if Si is used as material of the semiconductor substrate, Si is optimal as material of the connecting substrate with respect to thermal strain, but silicon carbide (SiC) or aluminum nitride (AlN) having substantially the same linear expansivity as Si may also be used. Since SiC and AlN have a higher thermal conductivity than Si, these are excellent with respect to radiation properties, too.
If the semiconductor substrate used for the chip is formed of a compound semiconductor, e.g. gallium arsenic such materials as GaAs, beryllia (BeO) and alumina (Al2O3) are proper for the connecting substrate.
A tolerable difference in thermal expansivity depends on the size and pitch of the connection terminals (pads) and the size of the connecting substrate. In order to ensure reliable connection between the chips, which is aimed at by the invention, it is preferable that the difference between the thermal expansivity of the material of the connecting substrate and the thermal expansivity of the material of the semiconductor substrate is within xc2x15.0xc3x9710xe2x88x926.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.